Technology
The invention is a semiconductor nanostructure based non-volatile memory cell that can provide the best of both DRAM and flash memory: long term storage with write speeds nearly as fast as DRAM. One difference from normal flash memory is varying the barrier height by changing the bias on the depletion region, enabling either retention or insertion of charge into the QD. A further difference is growing the QDs in the depletion region of a p-n junction, so that holes are stored in the QDs. Charge removal is achieved by using tunneling. The read mechanism is similar to that of flash memory.
IP Rights
US Patent US 7,948,822 B2
European Patent EP 2097904 B1
German/ Japanese/ Korean/ Patent Application
Patent Owner
Technische Universität Berlin, Germany





